1. Field of the Invention
The present invention relates to a semiconductor device including an electrostatic discharge (ESD) protection diode for protecting circuits on the semiconductor device from ESD.
2. Description of the Related Art
Electrostatic discharge (ESD) usually occurs when a semiconductor device comes into contact with or is positioned near an object charged to a considerably different electrostatic potential than that of the semiconductor device. During ESD, a large amount of charges are usually transferred to the semiconductor device for a time shorter than 1 μs, and a temporary voltage or current is generated in the semiconductor device due to this voltage or current. Such a temporary voltage or current that exceeds the operational range of the semiconductor device can damage circuits in the semiconductor device. Consequently, in order to protect the semiconductor device from destruction due to inflow of these kinds of temporary voltages or currents, an ESD protection circuit is inserted into a portion which externally connects the semiconductor device, for example, an input pad. ESD is diverted by the ESD protection circuit through a ground line or a power supply line, and, thus, the circuits inside the semiconductor device are protected.
When a diode is used as an ESD protection device, a well of the semiconductor substrate functions as a first electrode of the diode, and an active region that is formed in the well and has an opposite conductivity to the well, functions as a second electrode. A contact that is connected to an input pad, a ground line, or a power supply line is connected to the well and the active region. In a portion where the contact is connected to the well, a heavy impurity region is formed in order to form an Ohmic contact. The high impurity region of the well is called a sub-region, and corresponds to the active region.
FIG. 1 illustrates a layout of a conventional ESD protection diode. Referring to FIG. 1, an active region 10, which is tetragonal or polygonal, is surrounded by a sub-region 20, which is a high impurity region of a well. A device isolation layer 30 is formed between the active region 10 and the sub-region 20. Contacts 12 and 22 are respectively formed in the active region 10 and the sub-region 20.
When a current flows through the ESD protection diode, the arrangement of the contacts 12 and 22 influences the flow of the current. Contacts 12a at corners of the tetragonal active region 10 are surrounded by the contacts 22 of the sub-region 20 which are more in number than contacts 12b and 12c at non-corner portions of the active region 10. Since many paths through which current flows are provided around the contacts 12a, a resistance seen at the path of a current through the contacts 12a is small, and thus the current concentrates on the contacts 12a, and accordingly, the contacts 12a are likely to be damaged.
On the other hand, as a current concentrates on the contacts 12a, the current may not substantially flow through the contacts 12b and 12c on the non-corner portions of the active region 10. In particular, less current may flow through the contacts 12c in inner portions of the active region 10, surrounded by other contacts, than through the contacts 12b on edges of the active 10. Accordingly, ESD current may not be efficiently emitted despite the surface area that the active region 10 occupies.